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atj2073 data sheet page 1 of 45 actions semiconductor co.,ltd actions semiconductor co.,ltd atj2073 (LQFP128) data sheet ver. 1.10
atj2073 data sheet page 2 of 45 actions semiconductor co.,ltd revision history 1. initial revision on sep. 10, 2003.
atj2073 data sheet page 3 of 45 actions semiconductor co.,ltd contents 1 short descriptions ............................................................................................................. ........4 2 features....................................................................................................................... ...............4 3 architecture overview .......................................................................................................... ....5 4 pin descriptions............................................................................................................... ..........6 4.1 pinout..................................................................................................................... ...................................... 6 4.2 pin sort by number......................................................................................................... .............................. 7 4.3 pin sort by function....................................................................................................... ............................ 13 5 functional description ......................................................................................................... ...22 5.1 dsp core ................................................................................................................... ................................ 22 5.2 mcu core ................................................................................................................... .............................. 22 5.3 system me mory mapping ...................................................................................................... ................... 22 5.4 usb1.1 interface ........................................................................................................... ............................ 23 5.5 mpeg decoder............................................................................................................... ........................... 23 5.6 microphone interface....................................................................................................... .......................... 24 5.7 spdif interface ............................................................................................................ ............................. 25 5.8 power management unit (pmu)................................................................................................ ............... 26 6 control interfaces ............................................................................................................. .......27 6.1 how system powe r up........................................................................................................ ...................... 27 6.2 key matr ix scan ............................................................................................................ ............................ 28 6.3 4*13 lcd driver............................................................................................................ ........................... 29 6.4 8080/6800 lcm interface .................................................................................................... ..................... 30 7 pin configurations............................................................................................................. ......32 8 electrical characteristics ..................................................................................................... ....34 8.1 absolute maximum ratings ................................................................................................... ................... 34 8.2 capacitance (ta = 25 , vcc = 0 v) ...................................................................................................... 34 8.3 dc characteristics (ta = 25 , vdd = 2.35 v, vc c = 3.15 v) ............................................................. 34 8.4 ac characteristics (ta = 25 , vdd = 2 to 2.7 v, v cc = 2.7 to 3.6 v)................................................ 35 9 typical performance characteristics .......................................................................................41 9.1 a/d converter characteristics.............................................................................................. ..................... 41 9.2 d/a co nverter .............................................................................................................. ............................. 41 9.3 internal power amplifier (2 channels) ...................................................................................... ................ 42 9.4 mcu/dsp dissipation (ivdd vs. frequency)................................................................................... ........ 43 10 outline dimension.............................................................................................................. .....44
atj2073 data sheet page 4 of 45 actions semiconductor co.,ltd 1 short descriptions the atj2073 is a single-chip highly-integrated digital music system solution for devices such as dedicated audio players, pdas, and cell phones. it includes an audio decoder with a high performance dsp with embedded ram, adpcm/ag record capabilities and usb interface for downloading music and uploading voice recordings. atj2073 also provides an interface to s/pdif audio data input, flash memory, led/lcd, button and switch inputs, headphone, and microphone, and fm radio control. the atj2073?s programmable architecture supports the mp3 and other digital audio standards. for devices like usb flash disk, the atj2073 can act as a usb mass storage slave device to pers onal computer system. the atj2073 has low power consumption to allow long battery life and an efficien t flexible on-chip dc-dc converter that allows many different battery configurations, including 1xaa, 1xaaa, 2xaa,2xaaa. 2 features ? 24-bit dsp core with on-chip ice support ? on-chip dsp 16kx24 pm and (16k-256)x24 dm, can be switched to be mcu memory space ? integrated 8bit mcu with on-chip ice support which the instructions are compatible with the z80 cpu ? internal 16k bytes sram accessed by mcu ? external up to 25-bit code address space with 7 chips select ? support 14.318mhz/16.368mhz/17.734475mhz/24.576mhz osc with on-chip pll for dsp ? supported up to 3*4gbyte nand type flash ? 2-channel dma for mcu ? 1-channel ctc(counter/ti mer controller) for mcu ? on-chip interrupt controller for mcu ? built-in power management unit(pmu), supporting 1 or 2 batteries operation ? support rtc with 32.768khz or 76.8khz osc ? built-in usb1.1 interface ? support spdif in/uart/ir interface ? support on-chip stereo 18 bit sigma-delta dac ? support external 6800 or 8086 series interface lcm ? support 4x13 matrix keyboard circuit auto scan ? support 20 general purpose input/output ? support external epson series lcm frame buffer up to 320x240 dots ? support on-chip 1/3 biased 1/4 duty lcd driver(4x13dots, multiplexed ) ? support external cmos image sensor interface ? on-chip 16-bit adc for microphone input support , sample rate at 8k/11k/12k/16k/22k/24khz ? on-chip 2 channel headphone power amplifiers ? 128-pin 14x14x1.4mm lqfp package
atj2073 data sheet page 5 of 45 actions semiconductor co.,ltd 8bit mcu ext.mem i/f uart/ ir general purpose input /output usb 1.1 bus/dma/irq controller z ram 16k*8 ipm 16k*24 idm 16k*24 24bit dsp dac pmu pll1/2 xtal rtc headphone amplifeer adc mic in platform earphone led/ilcd keyscan/ switchs mouse/ keyboard nor/nand flash smart media cand compact flash card multi media card ide driver 32.768khz battery 1aaor2aa 24.576mhz usb bus microphone gain spdif ice ice port spdif gpio fm module 3 architecture overview
atj2073 data sheet page 6 of 45 actions semiconductor co.,ltd 4 pin descriptions 4.1 pinout
atj2073 data sheet page 7 of 45 actions semiconductor co.,ltd 4.2 pin sort by number pin no. pin name i/o type reset default short description 1 vcc pwr power supply for pads circuits giof3 bi z bit3 of general purpose i/o port f keyo3 o z bit3 of key scan circuit output 2 2 (1) 2 (3) seg15 o z seg15 of int. 4comx28seg lcd driver giof1 bi z bit1 of general purpose i/o port f keyo1 o z bit1 of key scan circuit output 3 3 (1) 3 (3) seg13 o z seg13 of int. 4comx28seg lcd driver giof0 bi z bit0 of general purpose i/o port f keyo0 o z bit0 of key scan circuit output 4 4 (1) 4 (3) seg12 o z seg12 of int. 4comx28seg lcd driver gioe7 bi z bit7 of general purpose i/o port e keyi11 i z bit11 of key scan circuit input 5 5 (1) 5 (3) seg11 o z seg11 of int. 4comx28seg lcd driver gioe6 bi z bit6 of general purpose i/o port e keyi10 i z bit10 of key scan circuit input 6 6 (1) 6 (3) seg10 o z seg10 of int. 4comx28seg lcd driver gioe5 bi z bit5 of general purpose i/o port e keyi9 i z bit9 of key scan circuit input 7 7 (1) 7 (3) seg9 o z seg9 of int. 4comx28seg lcd driver gioe4 bi z bit4 of general purpose i/o port e keyi8 i z bit8 of key scan circuit input 8 8 (1) 8 (3) seg8 o z seg8 of int. 4comx28seg lcd driver gioe3 bi z bit3 of general purpose i/o port e keyi7 i z bit7 of key scan circuit input 9 9 (1) 9 (3) seg7 o z seg7 of int. 4comx28seg lcd driver giod7 bi z bit7 of general purpose i/o port d tcpd7 o z bit7 of epson series lcm data bus keyi3 i z bit3 of key scan circuit input 10 10 (1) 10 (2) 10 (3) seg3 o z seg3 of int. 4comx28seg lcd driver giod6 bi z bit6 of general purpose i/o port d 11 11 (1) tcpd6 o z bit6 of epson series lcm data bus
atj2073 data sheet page 8 of 45 actions semiconductor co.,ltd keyi2 i z bit2 of key scan circuit input 11 (2) 11 (3) seg2 o z seg2 of int. 4comx28seg lcd driver giod5 bi z bit5 of general purpose i/o port d tcpd5 o z bit5 of epson series lcm data bus keyi1 i z bit1 of key scan circuit input 12 12 (1) 12 (2) 12 (3) seg1 o z seg1 of int. 4comx28seg lcd driver 13 gnd pwr / digital signal ground giod4 bi z bit4 of general purpose i/o port d tcpd4 o z bit4 of epson series lcm data bus keyi0 i z bit0 of key scan circuit input 14 14 (1) 14 (2) 14 (3) seg0 o z seg0 of int. 4comx28seg lcd driver 15 vdd pwr power supply for core giod3 bi z bit3 of general purpose i/o port d tcpd3 o z bit3 of epson series lcm data bus 16 16 (1) 16 (3) com3 o z com3 of int. 4comx28seg lcd driver giod2 bi z bit2 of general purpose i/o port d tcpd2 o z bit2 of epson series lcm data bus 17 17 (1) 17 (3) com2 o z com2 of int. 4comx28seg lcd driver giod1 bi z bit1 of general purpose i/o port d tcpd1 o z bit1 of epson series lcm data bus 18 18 (1) 18 (3) com1 o z com1 of int. 4comx28seg lcd driver giod0 bi z bit0 of general purpose i/o port d tcpd0 o z bit0 of epson series lcm data bus 19 19 (1) 19 (3) com0 o z com0 of int. 4comx28seg lcd driver mwr- bi h ext. memory write active signal 20 20 (1) we- o h nand type flash write enable mrd- bi h ext. memory read active signal 21 21 (1) re o h nand type flash read enable 22 a0 bi l bit0 of ext. memory address bus 23 a1 bi l bit1 of ext. memory address bus 24 a2 bi l bit2 of ext. memory address bus 25 a3 bi l bit3 of ext. memory address bus 26 a4 bi l bit4 of ext. memory address bus 27 a5 bi l bit5 of ext. memory address bus
atj2073 data sheet page 9 of 45 actions semiconductor co.,ltd 28 a6 bi l bit6 of ext. memory address bus 29 a7 bi l bit7 of ext. memory address bus 30 a8 bi l bit8 of ext. memory address bus 31 nmi- siu h ext. non-maskable interrupt input 32 gnd pwr / digital signal ground 33 gnd pwr / digital signal ground 34 vcc pwr power supply for pads circuits 35 a9 bi l bit9 of ext. memory address bus 36 a10 bi l bit10 of ext. memory address bus 37 a11 bi l bit11 of ext. memory address bus 38 a12 bi l bit12 of ext. memory address bus 39 a13 bi l bit13 of ext. memory address bus 40 zicedo o l debug pin, data output from dsu 41 zicedi siu h debug pin, data input to dsu 42 ziceck siu h debug pin, clock into dsu 43 ce2- o h ext. memory chip select 2 44 test si l test mode control, 0:normal mode 1:test mode 45 zicerst- siu h debug pin, to reset dsu 46 ce3- o h ext. memory chip select 3 47 ziceen- siu h debug pin, to enable dsu 48 ce4- o h ext. memory chip select 4 49 reset- si h system reset input 50 a14 o l bit14 of ext. memory address bus 51 ce5- o h ext. memory chip select 5 52 d0 bi z bit0 of ext. memory data bus 53 d1 bi z bit1 of ext. memory data bus 54 d2 bi z bit2 of ext. memory data bus 55 d3 bi z bit3 of ext. memory data bus 56 d4 bi z bit4 of ext. memory data bus 57 d5 bi z bit5 of ext. memory data bus 58 d6 bi z bit6 of ext. memory data bus 59 d7 bi z bit7 of ext. memory data bus 60 ce0- o h ext. memory chip select 0 61 ce1- o h ext. memory chip select 1
atj2073 data sheet page 10 of 45 actions semico nductor co.,ltd 62 ce6- o h ext. memory chip select 6 63 vdd pwr power supply for core 64 losci ai / low frequency crystal osc input 65 losco ao / low frequency crystal osc output 66 gnd pwr / digital signal ground a15 o l bit15 of ext. memory address bus 67 67 (1) cle o l command latch enable of nand type flash a16 o l bit16 of ext. memory address bus 68 68 (1) ale o l address latch enable of nand type flash 69 a17 o l bit17 of ext. memory address bus 70 a18 o l bit18 of ext. memory address bus 71 a19 o l bit19 of ext. memory address bus/gpo 72 a20 o l bit20 of ext. memory address bus/gpo 73 a21 o l bit21 of ext. memory address bus/gpo 74 a22 o l bit22 of ext. memory address bus/gpo 75 a23 o l bit23 of ext. memory address bus/gpo 76 a24 o l bit24 of ext. memory address bus/gpo 77 vcc pwr power supply for pads circuits 78 usbd- a / usb negative connect 79 usbd+ a / usb positive connect 80 usbvbus i l usb cable power signal 81 pvdd a / bypass capacitor for power amplifier 82 paor a / output of right channel power amplifier 83 paol a / output of left channel power amplifier 84 pgnd pwr / ground for power amplifier circuits 85 pair a / input of right channel power amplifier 86 pail a / input of left channel power amplifier 87 aoutr a / int. sigma-dalta dac right channel analog output 88 aoutl a / int. sigma-dalta dac left channel analog output 89 vrda a / reference voltage for adc 90 nc / / 91 vrad a / reference voltage for adc 92 agci a / microphone adc amplifier input
atj2073 data sheet page 11 of 45 actions semico nductor co.,ltd 93 micout a / microphone pre-amplifier output 94 micin a / microphone pre-amplifier input 95 vmic a / power supply for microphone bias circuits 96 agnd pwr / analog ground for record, and adc blocks 97 avcc pwr power supply for record, and adc blocks 98 batsel i battery select, 0:one battery 1:two batteries 99 ibias i int. bias pin with a ext.r(1.5mohm) to ground 100 vrefi a reference voltage input (1.5v) 101 vl0 ai battery monitor reference voltag e input ( for example 1.40v) 102 vl1 ai battery monitor reference volt age input (for example 1.30v) 103 vl2 ai battery monitor reference volt age input (for example 1.15v) 104 vl3 ai battery monitor reference volt age input (for example 1.05v) 105 dcdis i l int dc-dc converter disable, 0:enable 1:disable 106 vbat i battery signal input (1.0-1.5v) 107 dcf2 ai / vcc dc-dc feedback pin 108 dcf1 ai / vdd dc-dc feedback pin 109 vp1 pwr power supply for int. regulator 110 vdd pwr power supply for core 111 vp2 ai / input for int. power switch 112 dcop2 ao / vcc dc-dc pulse output 113 dcop1 ao / vdd dc-dc pulse output 114 avdd pwr power supply for pll analog circuits 115 avss pwr / ground for pll analog circuits 116 hosci ai / high frequency crystal osc input 117 hosco ao / high frequency crystal osc output 118 gnd pwr / digital signal ground 119 xsclk o h epson series lcm xsclk output 120 dispoff o z epson series lcm display off control output frame o z epson series lcm frame signal output lcm_ce o z 6800 series lcm ce 121 121 (1) 121 (3) v2 o z int. 4comx28seg lcd driver v2
atj2073 data sheet page 12 of 45 actions semico nductor co.,ltd 122 vcc pwr power supply for pads circuits ysclk_lp o l epson series lcm ysclk/lp signal output 123 123 (1) lcm_rw- o l 6800 series lcm rw- gioc2 bi z bit2 of general purpose i/o port c sin2 i z uart2 serial input 124 124 (1) 124 (2) irrx i z ir receive input ydu o z epson series lcm ydu signal output lcm_cs- o z 6800 series lcm cs- 125 125 (1) 125 (3) v1 o z int. 4comx28seg lcd driver v1 gioc3 bi z bit3 of general purpose i/o port c sout2 o z uart2 serial output 126 126 (1) 126 (2) irtx o z ir transmit output gioc4 bi z bit4 of general purpose i/o port c 127 127 (1) spdifrx bi z spdif receive input giof4 bi z bit4 of general purpose i/o port f keyo4 o z bit4 of key scan circuit output 128 128 (1) 128 (3) seg16 o z seg16 of int. 4comx28seg lcd driver
atj2073 data sheet page 13 of 45 actions semico nductor co.,ltd 4.3 pin sort by function type pin no. pin name i/o type reset default short description 1 vcc pwr power supply for pads circuits 34 vcc pwr power supply for pads circuits 77 vcc pwr power supply for pads circuits 122 vcc pwr power supply for pads circuits 97 avcc pwr power supply for record, and adc blocks 15 vdd pwr power supply for core 63 vdd pwr power supply for core 110 vdd pwr power supply for core 114 avdd pwr power supply for pll analog circuits 13 gnd pwr / digital signal ground 32 gnd pwr / digital signal ground 33 gnd pwr / digital signal ground 66 gnd pwr / digital signal ground 118 gnd pwr / digital signal ground 84 pgnd pwr / ground for power amplifier circuits 96 agnd pwr / analog ground for record, t and adc blocks 115 avss pwr / ground for pll analog circuits power 109 vp1 pwr power supply for int. regulator 98 batsel i battery select, 0:one battery 1:two batteries 99 ibias i int. bias pin with a ext.r(1.5mohm) to ground 100 vrefi a reference voltage input (1.5v) 101 vl0 ai battery monitor reference voltage input (for example 1.40v) 102 vl1 ai battery monitor reference voltage input (for example 1.30v) 103 vl2 ai battery monitor reference voltage input (for example 1.15v) dc-dc 104 vl3 ai battery monitor reference voltage input (for example 1.05v)
atj2073 data sheet page 14 of 45 actions semico nductor co.,ltd 105 dcdis i l int dc-dc converter disable, 0:enable 1:disable 106 vbat i battery signal input (1.0-1.5v) 107 dcf2 ai / vcc dc-dc feedback pin 108 dcf1 ai / vdd dc-dc feedback pin 111 vp2 ai / input for int. power switch 112 dcop2 ao / vcc dc-dc pulse output 113 dcop1 ao / vdd dc-dc pulse output 45 zicerst- siu h debug pin, to reset dsu 47 ziceen- siu h debug pin, to enable dsu 41 zicedi siu h debug pin, data input to dsu 42 ziceck siu h debug pin, clock into dsu ice interface 40 zicedo o l debug pin, data output from dsu int 31 nmi- siu h ext. non- maskable interrupt input test 44 test si l test mode control, 0:normal mode 1:test mode reset- 49 reset- si h system reset input 60 ce0- o h ext. memory chip select 0 61 ce1- o h ext. memory chip select 1 43 ce2- o h ext. memory chip select 2 46 ce3- o h ext. memory chip select 3 48 ce4- o h ext. memory chip select 4 51 ce5- o h ext. memory chip select 5 chip select interface 62 ce6- o h ext. memory chip select 6 giof0 bi z bit0 of general purpose i/o port f keyo0 o z bit0 of key scan circuit output 4 seg12 o z seg12 of lcd4*28 giof1 bi z bit1 of general purpose i/o port f keyo1 o z bit1 of key scan circuit output 3 seg13 o z seg13 of lcd4*28 giof3 bi z bit3 of general purpose i/o port f keyo3 o z bit3 of key scan circuit output 2 seg14 o z seg14 of lcd4*28 giof4 bi z bit4 of general purpose i/o port f keyo4 o z bit4 of key scan circuit output keyboard interface 128 seg15 o z seg15 of lcd4*28
atj2073 data sheet page 15 of 45 actions semico nductor co.,ltd gioe3 bi z bit3 of general purpose i/o port e keyi7 i z bit7 of key scan circuit input 9 seg7 o z seg7 of lcd4*28 gioe4 bi z bit4 of general purpose i/o port e keyi8 i z bit8 of key scan circuit input 8 seg8 o z seg8 of lcd4*28 gioe5 bi z bit5 of general purpose i/o port e keyi9 i z bit9 of key scan circuit input 7 seg9 o z seg9 of lcd4*28 gioe6 bi z bit6 of general purpose i/o port e keyi10 i z bit10 of key scan circuit input 6 seg10 o z seg10 of lcd4*28 gioe7 bi z bit7 of general purpose i/o port e keyi11 i z bit11 of key scan circuit input 5 seg11 o z seg11 of lcd4*28 giod0 bi z bit0 of general purpose i/o port d tcpd0 o z bit0 of epson series lcm data bus 19 com0 o z com0 of lcd4*28 giod1 bi z bit1 of general purpose i/o port d tcpd1 o z bit1 of epson series lcm data bus 18 com1 o z com1 of lcd4*28 giod2 bi z bit2 of general purpose i/o port d tcpd2 o z bit2 of epson series lcm data bus 17 com2 o z com2 of lcd4*28 giod3 bi z bit3 of general purpose i/o port d tcpd3 o z bit3 of epson series lcm data bus 16 com3 o z com3 of lcd4*28 giod4 bi z bit4 of general purpose i/o port d tcpd4 o z bit4 of epson series lcm data bus keyi0 i z bit0 of key scan circuit input 14 seg0 o z seg0 of lcd4*28 giod5 bi z bit5 of general purpose i/o port d tcpd5 o z bit5 of epson series lcm data bus keyi1 i z bit1 of key scan circuit input display epson series lcm interface 12 seg1 o z seg1 of lcd4*28
atj2073 data sheet page 16 of 45 actions semico nductor co.,ltd giod6 bi z bit6 of general purpose i/o port d tcpd6 o z bit6 of epson series lcm data bus keyi2 i z bit2 of key scan circuit input 11 seg2 o z seg2 of lcd4*28 giod7 bi z bit7 of general purpose i/o port d tcpd7 o z bit7 of epson series lcm data bus keyi3 i z bit3 of key scan circuit input 10 seg3 o z seg3 of lcd4*28 119 xsclk o h epson series lcm xsclk output 120 dispoff o z epson series lcm display off control output frame o z epson series lcm frame signal output 121 lcm_ce o z 6800 series lcm ce ysclk_lp o l epson series lcm ysclk/lp signal output 123 lcm_rw- o l 6800 series lcm rw- ydu o z epson series lcm ydu signal output 125 lcm_cs- o z 6800 series lcm cs- frame o z epson series lcm frame signal output 121 lcm_ce o z 6800 series lcm ce ysclk_lp o l epson series lcm ysclk/lp signal output 123 lcm_rw- o l 6800 series lcm rw- ydu o z epson series lcm ydu signal output 125 lcm_cs- o z 6800 series lcm cs- 52 d0 bi z bit0 of ext. memory data bus 53 d1 bi z bit1 of ext. memory data bus 54 d2 bi z bit2 of ext. memory data bus 55 d3 bi z bit3 of ext. memory data bus 56 d4 bi z bit4 of ext. memory data bus 57 d5 bi z bit5 of ext. memory data bus 58 d6 bi z bit6 of ext. memory data bus 6800 series lcm interface 59 d7 bi z bit7 of ext. memory data bus 19 giod0 bi z bit0 of general purpose i/o port d
atj2073 data sheet page 17 of 45 actions semico nductor co.,ltd tcpd0 o z bit0 of epson series lcm data bus com0 o z com0 of lcd4*28 giod1 bi z bit1 of general purpose i/o port d tcpd1 o z bit1 of epson series lcm data bus 18 com1 o z com1 of lcd4*28 giod2 bi z bit2 of general purpose i/o port d tcpd2 o z bit2 of epson series lcm data bus 17 com2 o z com2 of lcd4*28 giod3 bi z bit3 of general purpose i/o port d tcpd3 o z bit3 of epson series lcm data bus 16 com3 o z com3 of lcd4*28 giod4 bi z bit4 of general purpose i/o port d tcpd4 o z bit4 of epson series lcm data bus keyi0 i z bit0 of key scan circuit input 14 seg0 o z seg0 of lcd4*28 giod5 bi z bit5 of general purpose i/o port d tcpd5 o z bit5 of epson series lcm data bus keyi1 i z bit1 of key scan circuit input 12 seg1 o z seg1 of lcd4*28 giod6 bi z bit6 of general purpose i/o port d tcpd6 o z bit6 of epson series lcm data bus keyi2 i z bit2 of key scan circuit input 11 seg2 o z seg2 of lcd4*28 giod7 bi z bit7 of general purpose i/o port d tcpd7 o z bit7 of epson series lcm data bus keyi3 i z bit3 of key scan circuit input 10 seg3 o z seg3 of lcd4*28 gioe3 bi z bit3 of general purpose i/o port e keyi7 i z bit7 of key scan circuit input 9 seg7 o z seg7 of lcd4*28 gioe4 bi z bit4 of general purpose i/o port e keyi8 i z bit8 of key scan circuit input 8 seg8 o z seg8 of lcd4*28 gioe5 bi z bit5 of general purpose i/o port e display lcd4*28 interface 7 keyi9 i z bit9 of key scan circuit input
atj2073 data sheet page 18 of 45 actions semico nductor co.,ltd seg9 o z seg9 of lcd4*28 gioe6 bi z bit6 of general purpose i/o port e keyi10 i z bit10 of key scan circuit input 6 seg10 o z seg10 of lcd4*28 gioe7 bi z bit7 of general purpose i/o port e keyi11 i z bit11 of key scan circuit input 5 seg11 o z seg11 of lcd4*28 giof0 bi z bit0 of general purpose i/o port f keyo0 o z bit0 of key scan circuit output 4 seg12 o z seg12 of lcd4*28 giof1 bi z bit1 of general purpose i/o port f keyo1 o z bit1 of key scan circuit output 3 seg13 o z seg13 of lcd4*28 giof3 bi z bit3 of general purpose i/o port f keyo3 o z bit3 of key scan circuit output 2 seg14 o z seg14 of lcd4*28 giof4 bi z bit4 of general purpose i/o port f keyo4 o z bit4 of key scan circuit output 128 seg15 o z seg15 of lcd4*28 a15 o l bit15 of ext. memory address bus 67 cle o l command latch enable of nand type flash a16 o l bit16 of ext. memory address bus 68 ale o l address latch enable of nand type flash 52 d0 bi z bit0 of ext. memory data bus 53 d1 bi z bit1 of ext. memory data bus 54 d2 bi z bit2 of ext. memory data bus 55 d3 bi z bit3 of ext. memory data bus 56 d4 bi z bit4 of ext. memory data bus 57 d5 bi z bit5 of ext. memory data bus 58 d6 bi z bit6 of ext. memory data bus 59 d7 bi z bit7 of ext. memory data bus mwr- bi h ext. memory write active signal 20 we- o h nand type flash write enable nand type flash or smc interface 21 mrd- bi h ext. memory read active signal
atj2073 data sheet page 19 of 45 actions semico nductor co.,ltd re o h nand type flash read enable mwr- bi h ext. memory write active signal 20 we- o h nand type flash write enable mrd- bi h ext. memory read active signal 21 re o h nand type flash read enable 22 a0 bi l bit0 of ext. memory address bus 23 a1 bi l bit1 of ext. memory address bus 24 a2 bi l bit2 of ext. memory address bus 25 a3 bi l bit3 of ext. memory address bus 26 a4 bi l bit4 of ext. memory address bus 27 a5 bi l bit5 of ext. memory address bus 28 a6 bi l bit6 of ext. memory address bus 29 a7 bi l bit7 of ext. memory address bus 30 a8 bi l bit8 of ext. memory address bus 35 a9 bi l bit9 of ext. memory address bus 36 a10 bi l bit10 of ext. memory address bus 37 a11 bi l bit11 of ext. memory address bus 38 a12 bi l bit12 of ext. memory address bus 39 a13 bi l bit13 of ext. memory address bus 50 a14 o l bit14 of ext. memory address bus a15 o l bit15 of ext. memory address bus 67 cle o l command latch enable of nand type flash a16 o l bit16 of ext. memory address bus 68 ale o l address latch enable of nand type flash 69 a17 o l bit17 of ext. memory address bus 70 a18 o l bit18 of ext. memory address bus 71 a19 o l bit19 of ext. memory address bus /gpo 72 a20 o l bit20 of ext. memory address bus /gpo 73 a21 o l bit21 of ext. memory address bus /gpo 74 a22 o l bit22 of ext. memory address bus /gpo nor type flash interface 75 a23 o l bit23 of ext. memory address bus /gpo
atj2073 data sheet page 20 of 45 actions semico nductor co.,ltd 76 a24 o l bit24 of ext. memory address bus /gpo 52 d0 bi z bit0 of ext. memory data bus 53 d1 bi z bit1 of ext. memory data bus 54 d2 bi z bit2 of ext. memory data bus 55 d3 bi z bit3 of ext. memory data bus 56 d4 bi z bit4 of ext. memory data bus 57 d5 bi z bit5 of ext. memory data bus 58 d6 bi z bit6 of ext. memory data bus 59 d7 bi z bit7 of ext. memory data bus 64 losci ai / low frequency crystal osc input 65 losco ao / low frequency crystal osc output 116 hosci ai / high frequency crystal osc input crystal interface 117 hosco ao / high frequency crystal osc output 78 usbd- a / usb negative connect 79 usbd+ a / usb positive connect usb interface 80 usbvbus i l usb cable power signal 81 pvdd a / bypass capacitor for power amplifier 82 paor a / output of right channel power amplifier 83 paol a / output of left channel power amplifier 85 pair a / input of right channel power amplifier power amplifier interface 86 pail a / input of left channel power amplifier 87 aoutr a / int. sigma-dalta dac right channel analog output dac output interface 88 aoutl a / int. sigma-dalta dac left channel analog output 89 vrda a / reference voltage for adc 90 nc / / 91 vrad a / reference voltage for adc 92 agci a / microphone adc amplifier input 93 micout a / microphone pre-amplifier output 94 micin a / microphone pre-amplifier input adc interface 95 vmic a / power supply for microphone bias circuits
atj2073 data sheet page 21 of 45 actions semico nductor co.,ltd gioc2 bi z bit2 of general purpose i/o port c sin2 i z uart2 serial input 124 irrx i z ir receive input gioc3 bi z bit3 of general purpose i/o port c sout2 o z uart2 serial output uart interface 126 irtx o z ir transmit output gioc2 bi z bit2 of general purpose i/o port c sin2 i z uart2 serial input 124 irrx i z ir receive input gioc3 bi z bit3 of general purpose i/o port c sout2 o z uart2 serial output ir interface 126 irtx o z ir transmit output gioc4 bi z bit4 of general purpose i/o port c spdif interface 127 spdifrx bi z spdif receive input
atj2073 data sheet page 22 of 45 actions semico nductor co.,ltd 5 functional description 5.1 dsp core 24-bit harvard architecture dsp with on-chip ice support is built in. it works with a memory word length of 24 bits. atj2073 has 16kb*24bit program memory (pm) and (16kb-256)*24bit data memory (dm). memory-mapped register include dac interface. proce ss capability is controlled by software up to 48 mips. 5.2 mcu core integrated 8-bit mcu with on-chip ice support. instruction set is compatible with z80. process capability is controlled by software up to 24.576 mhz. 5.3 system memory mapping 16kb 16kb 32kb ipmm 16kb ipml 16kb idmh 16kb idmm 16kb idml 16kb vram 9.6kb ipmh 16kb bank0(32kb) bank1(32kb) bank2(32kb) bank3(32kb) ...... bank..(32kb) entended memory space (mcu.a15=1) internal memory space (mcu.a15=0) mcu 64kb memory space map 0000h 8000h ffffh
atj2073 data sheet page 23 of 45 actions semico nductor co.,ltd assuming mcu instruction uses a[15:0] to access memory space. if a[15]=0 -> mapped to internal sram ,then if a[14]=0, mapped to lower 16kb (zram) if a[14]=1, mapped to upper 16kb (ip mh/ipmm/ipml/idmh/idmm/idml /vram) when they are mapped into mcu memory space. additional three extended bits of sram page register (io index=0x05) are used to decode which page to access. bit 2 1 0 accessed page 0 0 0 16k of ipm low byte 0 0 1 16k of ipm middle byte 0 1 0 16k of ipm high byte 0 1 1 reserved 1 0 0 16k of idm low byte 1 0 1 16k of idm middle byte 1 1 0 16k of idm high byte 1 1 1 on-chip vram (video ram) ipm/idm can map to mcu memory space in 8k unit. if a[15]=1 -> external address pin a25~a15 are io mapped at 01h and 02h for ema15-25. while ema26-28 are used to decode ce0- ~ ce6-. ce0- is used to access boot co de from rom/mask/nor-type flash ce1- to ce6- can be configured to access rom, or ram or nand-type flash 5.4 usb1.1 interface compliant with usb spec 1.1. certified by usb if. 4 endpoints are provided. support bulk, control, interr upt and isochronous transfer mode . endpoint 1 and endpoint 2 employ two independent fifos for bulk or isochronous transfers. endpoint 0 and endpoint 3 have 8 bytes maximum packet size. there are 4 interrupt requests for each endpoint respectively. generally, this setting should be satisfying for most practical needs. 5.5 mpeg decoder with system software, atj2073 is competen t for mpeg 1/2/2.5 layer i/ii/iii decode. sample rates (sr) and bit rates (br) supported is shown as the following table. mpeg 2.5 sr\br 8 16 24 32 40 48 56 64 80 96 112 128 144 160 8 11.025 12 mpeg 2 sr\br 8 16 24 32 40 48 56 64 80 96 112 128 144 160
atj2073 data sheet page 24 of 45 actions semico nductor co.,ltd 16 22.05 24 mpeg 1 sr\br 32 40 48 56 64 80 96 112 128 160 192 224 256 320 32 44.1 48 table 1. sample rates and bit rates of layer iii supported mpeg 2 sr\br 8 16 24 32 40 48 56 64 80 96 112 128 144 160 16 22.05 24 mpeg 1 sr\br 32 48 56 64 80 96 112 128 160 192 224 256 320 384 32 44.1 48 table 2. sample rates and bit rates of layer ii supported mpeg 2 sr\br 32 48 56 64 80 96 112 128 144 160 176 192 224 256 16 22.05 24 mpeg 1 sr\br 32 64 96 128 160 192 224 256 288 320 352 384 416 448 32 44.1 48 table 3. sample rates and bit rates of layer i supported 5.6 microphone interface microphone interface is composed of mi crophone pre-amplifier and 16-bit adc. microphone pre-amplifier has 35db gain at least for suitable recording volume so the noise of microphone power supply must be very low. it is composed of a regulator and an external first order rc lpf. agc function is implemented by a variable gain amplifier and 4 register bits (mcu code control). the adc adopts switched-capacitor successive approximation method. its input is from microphone pre- amplifier?s output. function enable, sampling frequency select, and some other control signals are all from
atj2073 data sheet page 25 of 45 actions semico nductor co.,ltd one register. a d c db dc da d9 d6 d5 1.5v micin micout agci d4_[3:0] avcc agnd de_4 5.7 spdif interface the aes/ebu interface is a means for serially communicating digital audio data through one single transmission line. it provides two channels for audio data, a method for communicating control information, and has error detection capabilities. the control information is transmitted as one bit per sample and accumulates in a block structure. the data is bi-phase encoded, which enables the receiver to extract a clock from the data . coding violations, defined as preambles, are used to identify sample and block boundaries. 2 8-level by 8-bit fifo are used to buffer data fo r tx and rx. after received 192 frame- four bytes of channel status was appended into the rx fifo. when tx fifo is empty and spdif is enabled, 0 is send out for all frame. figure 7.1. frame/block format figure 7.2. biphase-mark encoding x channel a y channel b z channel a y channel b x channel a y channel b sub-frame sub-frame frame 0 frame 191 frame 1 start of channel status block 1 1011 00110101 00011
atj2073 data sheet page 26 of 45 actions semico nductor co.,ltd figure 7.3. preamble forms figure 7.4. sub-frame format 5.8 power management unit (pmu) pmu consists of dc-dc converter and regulator and battery monitor. atj2073 need two power trails if work rightly, vdd (core power) and vcc (i/o power). the power level is decided by external voltage-divided resistance network . due to describe clearly , we assume vdd=2.35v, vcc=3.15v. there are two battery modes with atj2073, one-battery mode and two-battery mode, selected by batsel. in one-battery mode, if pin vbat > 0.8v, some internal circuit (c1) begin to work first and it will rise up vdd. when vdd reaches 2.35v, that in ternal circuit (c1) st ops and another circuit (c2) takes over the pfm for both vdd and vcc dc-dc converter. in two-battery mode, if pin vbat > 1.3v, the internal regulator is enabled to supply vdd. if 0.8v < vbat < 1.3v, c2 will stimulate vdd dc-dc converter to maintain vdd. the judgement between vbat and 1.3v must have hysteresis for preventing atj2073 from unstable toggle between regulator mode and dc-dc mode. the vcc dc-dc converter always runs to maintain vcc. battery monitor compares the battery voltage at the vbat pin with four reference voltage pins named vl0, vl1, vl2, vl3. the four reference voltages are decided by external resistance network. for normal dry battery (1.5v) , the value can be : 1.4v, 1.3v, 1.15v, and 1.05v. if vbat < vl3, atj2073 will go into standby mode; if vbat < 0.8v, atj2073 will go into off mode, but the low frequency osc and rtc timer are still active. you can disable the clock of block when you do not use that block. even more you can stop all the clock, but low frequency osc, while you design appropriately. preamble auxdata v u c p lsb msb audio data 0 3 4 7 8 2728293031 bit sub-frame validity user data channel status data parity bit
atj2073 data sheet page 27 of 45 actions semico nductor co.,ltd dcf2 dcop2 dcdc2 dcdis batok dcop1 dcf1 dcdc1 sel dcdis batok df_6 mux batok regulator vp1 dcdis dcdis sel batok vp2 vdd rtc losco losci batok vbat df_7 vl0 df_6 vl1 df_5 vl2 df_4 vl3 0.8v dcdis batsel vrefi sel dcdis 1.5v reset- rst- ... rst- reset dcdis 6 control interfaces 6.1 how system power up when pin vbat get to about 0.8v level , dc-dc co nverter. will begin to rise up vdd and vcc. low frequency oscillator will begin to work too. after a duration , por(power on reset) will deassert . atj2073 finishes power up sequence . if pin reset- is not assert, mcu will run from address=0x8000. boot code at address=0x8000 will be as the following: jp 8003h ld a, 01h out (04h), a jp start ? ? start:
atj2073 data sheet page 28 of 45 actions semico nductor co.,ltd jp 8003 vbat vdd vcc losc por mcu 6.2 key matrix scan when key scan circuit is enabled, atj2073 will scan the keyboard periodly. it drives pin keyoutn [n=0?7] low pulse in turn . when a key is pressed, pin keyinn connecting the key will be found low level. there are 12 internal 8-bit registers for key value latch per scan. but only another one register (key scan data register ) for mcu to access key value . those 12 internal registers are mapped into this register, and an internal pointer is used to point to the current register to return scan data when read. any io write to this register will clear the internal register, and the pointer will increase by 1 and point to the next register after read is performed.
atj2073 data sheet page 29 of 45 actions semico nductor co.,ltd b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 1st reg 2nd reg 2nd reg 3rd reg b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 4th reg b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 keyout0 keyout1 keyout2 keyout3 keyout4 keyout5 keyout6 keyout7 keyin0 keyin1 keyin2 keyin3 keyin4 keyin5 keyin6 keyin7 keyin8 keyin9 keyin1 0 keyin1 1 5th reg 5th reg 6th reg 7th reg 8th reg 8th reg 9th reg 10th reg 11th reg 12th reg 11th reg example: reg$c0 readback is $ff,$af,$f7,$f f,$ff,$fe,$ff,$ff,$ff,$ff,$ff,$fe, indicate following 5 keys have pressed : [keyout ,keyin] [1,0], [1,2], [1,7 ], [3,4], [7,4] 6.3 4*13 lcd driver atj2073 builds in 1/3 biased 1/4 duty lcd driver. it outputs com and seg signals to lcd glass directly. bias voltage pin v1 and v2 need connect by-pass capacitor to ground. v0=gnd, v3=vcc.
atj2073 data sheet page 30 of 45 actions semico nductor co.,ltd com0 com1 com2 com3 segn v3 v2 v1 v0 on=v0 off=v2 on=v3 off=v1 n com0 com1 com2 com3 on off 3 2 +1+1+1 1+1+1+1 12 2 3 1.732 v3 v2 v1 v0 v3 v2 v1 v0 v3 v2 v1 v0 v3 v2 v1 v0 6.4 8080/6800 lcm interface atj2073 supports high-speed 8-bit parallel bi-direct ional lcm with 6800-series or 8080-series interface
atj2073 data sheet page 31 of 45 actions semico nductor co.,ltd 1. lcm with 8080-series interface: use a0 to select data register or command register in lcm. cex- is used as chip select. pin cs2 of lcm is pull high to vcc. mwr- is write enable signal, atj2073 latches d[7:0] at the rising edge. mrd- is read enable signal and lcm drives d[7:0] when mrd- is low. 2. lcm with 6800-series interface: use a0 to select data register or command register in lcm. lcm_cs- is used as chip select. pin cs2 of lcm is pull high to vcc. lcm_rw- is read/write indication signal and high indicates read operation. lcm_ce- is latch signal. it should latch d[7:0] at the falling edge.
atj2073 data sheet page 32 of 45 actions semico nductor co.,ltd 7 pin configurations atj2073 has many multiple function pins (mfp), these pins are multiplexed by several functions. pin name will indicate the default function. other functions can be enabled by system i/o register. pin function number name gpio segment lcd key board tcp lcm 17 giod0 giod0 com0 lcmd0 16 giod1 giod1 com1 lcmd1 15 giod2 giod2 com2 lcmd2 14 giod3 giod3 com3 lcmd3 13 giod4 giod4 seg0 keyi0 lcmd4 12 giod5 giod5 seg1 keyi1 lcmd5 11 giod6 giod6 seg2 keyi2 lcmd6 10 giod7 giod7 seg3 keyi3 lcmd7 9 gioe3 gioe3 seg7 keyi7 8 gioe4 gioe4 seg8 keyi8 7 gioe5 gioe5 seg9 keyi9 6 gioe6 gioe6 seg10 keyi10 5 gioe7 gioe7 seg11 keyi11 4 giof0 giof0 seg12 keyo0 3 giof1 giof1 seg13 keyo1 2 giof3 giof3 seg15 keyo3 128 giof4 giof4 seg16 keyo4 121 frame v2 125 ydu v1 enable condition default: io[b0]=0x00, io[b1]=0x00 io[b0]=0x2a, io[b1] [7:5]=101 io[b0]=0x3f, io[b1][7:6]=11 io[b0][5:2]=0101
atj2073 data sheet page 33 of 45 actions semico nductor co.,ltd pin functon number name nand flash uart irda spdif 20 mwr- we- 21 mrd- re 67 a15 cle 68 a16 ale 121 frame lcm_ce 123 ysclk_lp lcm_rw- 125 ydu lcm_cs- 124 gioc2 sin2 irrx 126 gioc3 sout2 irtx 127 gioc4 spdifrx enable condition default io[28]=0xfe io[70].1=1 io[70].1=1 io[70].2=1
atj2073 data sheet page 34 of 45 actions semico nductor co.,ltd 8 electrical characteristics 8.1 absolute maximum ratings parameter symbol condition min. max. unit vdd -0.5 +2.7 v supply voltage vcc -0.5 +3.6 v vcc >= 3.3 -0.5 +3.9 v input voltage vi vcc < 3.3 -0.5 vcc+0.6 v storage temperature tstg -50 +125 cautions 1. do not short-circuit two or mo re output pins simultaneously. 2. if even one of the above parameters exceeds the absolute maximum ratings even momentarily, the quality of the product may be de graded. the absolute maximum ratings,therefore, specify the value exceeding which the product may be physically damaged. use the product well within these ratings. the specifications and conditions shown in dc characte ristics and ac characteristics are the ranges for normal operation a nd quality assurance of the product. 8.2 capacitance (ta = 25 , vcc = 0 v) parameter symbol condition min. max. unit input capacitance ci 15 pf i/o capacitance cio fc = 1 mhz unmeasured pins returned to 0 v 15 pf 8.3 dc characteristics (ta = 25 , vdd = 2.35 v, vcc = 3.15 v) parameter symbol condition min. typ. max . unit high-level output voltage voh ioh = -2 ma 2.4 v low-level output voltage vol iol = 2 ma 0.4 v high-level input voltage vih 0.6* vcc vcc + 0.6 v low-level input voltage vil -0.3 0.4v cc v input leakage current ili vcc = 3.6 v, vi = vcc, 0 v 10 ua output leakage current ilo vcc = 3.6 v, vi = vcc, 0 v 5 ua gpio idrive1 gpioc1,gpioc3,gpioc5 2.60 ma
atj2073 data sheet page 35 of 45 actions semico nductor co.,ltd drive idrive2 other gpio 1.25 ma in fullspeed m ode (mcu run 24.576mhz in internal sram,dsp run 24mips) 40 ma ivdd in standby mode 100 ua in fullspeed m ode (mcu run 24.576mhz in internal sram,dsp run 24mips) 16 ma supply current two batteries mode ivcc in standby mode 18 ua notes 1. ivdd is a total core power supply current for the vdd power supply. ivdd is applied to the logic and pll and osc block. ivcc is a total i/o power supply current for the 3.3 v power supply. ivcc is applied to the usb, io, tp, and ad block. 8.4 ac characteristics (ta = 25 , vdd = 2 to 2.7 v, vcc = 2.7 to 3.6 v) ac test input waveform vcc 0v 0.6vcc 0.4vcc test points 0.4vcc 0.6vcc all input pins ac test output measuring points vcc 0v 0.5vcc test points 0.5vcc all output pins (1) reset parameter parameter symbol condition min. max. unit reset input low-level width twrsl reset# pin 160 n s vcc 0v reset# t wrsl (2) initialization parameter parameter symbol condition min. max. unit data sampling time (from reset# ) tss 61.04 u s
atj2073 data sheet page 36 of 45 actions semico nductor co.,ltd output delay time (fro m reset# ) tod 61.04 u s reset# t od t ss sampling point normal operation hi-z 32.768khz i/o pins (3) gpio interface parameter parameter symbol condition min. max. unit input level width tgpin normal operation 11/ fmcuclk s gpio input rise time tgprise 200 ns gpio input fall time tgpfall 200 ns output level width tgpout 11/ fmcuclk ns notes 1. fmcuclk is the frequency that mcu is running upon. (a) input level width (b) input rise/fall time (c) output level width
atj2073 data sheet page 37 of 45 actions semico nductor co.,ltd (4) ordinary rom parameter parameter symbol condition min. max. unit data access time (from address) note tacc hosc=24.576mh z 102 ns data access time (from cex# ) note tce hosc=24.576mh z 82 ns data input setup time tds hosc=24.576mh z 0 ns data input hold time tdh hosc=24.576mh z 0 ns a[24:0] cen-/mrd- d[7:0](i) t acc t ds t dh t ce (5) external system bus parameter parameter symbol condition min. max. unit txas memory read 0.5t ns address setup time (to command signal) note 1, 2 txas memory write 1.5t ns address hold time (from command signal) note 1, 2 txah 0.5t ns data output setup time (to command signal) note 1 twxds 0 t ns data output hold time (from command signal) note 1 twxdh 3 0.5t ns data input setup time (to command signal) note 1 trxds 0 2t ns data input hold time (from command signal) note 1 trxdh 0 ns notes 1. mrd#, mwr# are called the command signals for the external system bus interface. 2. t (ns) = 1000 / fmcuclk
atj2073 data sheet page 38 of 45 actions semico nductor co.,ltd mcuclk a[24:0] cen- mrd- d[7:0](i) mwr- d[7:0](o) 1 2 3 t xas t xas t xah t xah t rxds t rxdh t wxds t wxdh bus operation (a) instruction fetch cycle mcu clk mrd# cen# (b) memory read cycle mcu clk mrd# cen# (c) memory write cycle mcu clk mwr# cen#
atj2073 data sheet page 39 of 45 actions semico nductor co.,ltd (6) keyboard interface parameter parameter symbol condition min. max. unit keyout (7:0) low-level width tscan debounce time=2.5ms 130 u s voltage stabilization time (keyout n keyout (n+1)) tkwait debounce time=2.5ms 0 u s key scan interval time tki debounce time=2.5ms 130 u s key input delay time (from keyout n) tks debounce time=2.5ms 0 u s key input hold time (from keyout n) tkh debounce time=2.5ms 0 u s remarks 1. keyout(7:0) is multiplexed with giof(7:0); keyin(3:0) is multiplexed with giod(7:4); keyin(11:4) is multiplexed with gioe(7:0) 2. keyscan debouncing time is set thru bit(2:0) of the mfp configuration1 register[0xb1h] 3. n = 0 to 7 (a) keyboard scan parameter 1 keyout n (output) keyout (n+1) (output) t scan t kwait remark n=0 to 6 (b) keyboard scan parameter 2 keyout 0 (output) keyout 1 (output) t ki t kwait ss ss ss keyout 7 (output) (c) keyboard port parameter
atj2073 data sheet page 40 of 45 actions semico nductor co.,ltd keyout n (output) keyin (7:0) (input) t ks t kh remark n=0 to 7 (7) serial interface parameter prescale value 13 1.625 1 baud rate divisor %error divisor %error divisor %error 600 192 0.16% - - - - 1200 96 0.16% - - - - 1800 64 0.16% - - - - 2000 58 0.53% - - - - 2400 48 0.16% - - - - 3600 32 0.16% 256 0.16% - - 4800 24 0.16% 192 0.16% - - 7200 16 0.16% 128 0.16% 208 0.16% 9600 12 0.16% 96 0.16% 156 0.16% 14400 8 0.16% 64 0.16% 104 0.16% 19200 6 0.16% 48 0.16% 78 0.16% 28800 4 0.16% 32 0.16% 52 0.16% 38400 3 0.16% 24 0.16% 39 0.16% 57600 2 0.16% 16 0.16% 26 0.16% 115200 1 0.16% 8 0.16% 13 0.16% 230400 - - 4 0.16% - - 460800 - - 2 0.16% - - 750000 - - - - 2 0.00% 921600 - - 1 0.16% - - 1500000 - - - - 1 0.00% note : data transfer rate per bit, which is determined by the divisor of the baud-rate generator that is set with uart1/2 baud rate registers and clock prescaler that is set with uart1/2 control registers.
atj2073 data sheet page 41 of 45 actions semico nductor co.,ltd 9 typical performance characteristics 9.1 a/d converter characteristics (ta = 25 , vdd = 2.35 v, vcc = 3.3 v, sample rate=32khz) parameter symbol min typ. max unit dynamic range dr 60 db total harmonic distortion + noise thd+n 50 53 db frequency response (20-13khz) fr 1 db full scale input voltage(gain=0db) vifs 800 mvpp 9.2 d/a converter i 2 s interface parameter characteristics table parameter symbol test conditi ons min. typ. max. unit clock output frequency t soclk 48 khz/s stereo 16 bit/s 651 ns wordstrobe hold time after falling edge of clock t soiss 10 t soclk/ 2 ns data hold time afte r falling edge of clock t soodc 10 t soclk/ 2 ns
atj2073 data sheet page 42 of 45 actions semico nductor co.,ltd d/a converter characteristics (ta =25 , vdd=2.35v, vcc=3.3v, sample rate=4 8khz, bias current=8ua, quantizer level=0x05, volume level = 0x0d) parameter symbol min typ max unit signal / noise ratio snr 81 db total harmonic distortion * thd+n 0.05 % frequency response 20-20khz fr 0.6 db output common mode voltage vcm 1.5 v full scale output voltage vofs 0.38 vrms interchannel isolati on (1khz) iso 75 db interchannel gain mismatch(1khz) mmg 0.025 db * with 32 ohm load. 9.3 internal power amplifier (2 channels) test circuit: output power: > 2 x 4mw (32ohm, use avdd=2.15v ) > 2 x 10mw (32ohm, use avcc=3.00v ) 2.2u r1 4.7k r2 3k 47u pai pao a b
atj2073 data sheet page 43 of 45 actions semico nductor co.,ltd 9.4 mcu/dsp dissipation (ivdd vs. frequency) mcu dissipation (vbat=3.0v,dsp under reset, mcu runs in internal sram) clock source divisor factor ivdd(max) 32.768khz /(1?1024) 350ua /1 8.5ma /2 4.7ma /4 2.9ma /8 1.8ma /16 1.4ma /32 1.1ma /64 0.96ma /128 0.88ma /256 0.85ma /512 0.84ma 24.576mhz /1024 0.83ma dsp dissipation (vbat=3. 0v,mcu in debug mode) dsp speed (mips) ivdd (max) 6 11.7ma 12 18.8ma 24 30.7ma 36 43.2ma 48 55.9ma
atj2073 data sheet page 44 of 45 actions semico nductor co.,ltd 10 outline dimension
atj2073 data sheet page 45 of 45 actions semico nductor co.,ltd actions semiconductor co., ltd. 15-1,no.1, hit road, tangjia, zhuhai, guangdong, china 519085 tel. +86-756-3392353 fax. +86-756-3392251 http://www.actions.com.cn all information and data contained in this data sheet is without any commitment, is not to be considered as an offer for conclusion of a contract nor shall it be construed as to create any liability. any new issue of this data sheet invalidates previous issues. product availability and delivery dates are exclusively subject to our respective order confirmation form; the same applies to orders based on development samples delivered. by this publication, actions semiconductor co.,ltd. does not assume responsibility for patent infringements or other rights of third parties which may re sult from its use. reprinting is generally permitted, indicating the source. however, our prior consent must be obtained in all cases.

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